NETFPGA-SUME FPGA Board

• Ideal platform for high-performance and high-density networking design.
• State-of-the-art platform for networking
• Supports thirty 13.1 GHz GTH transceivers
• User LEDs and Push Buttons

The NETFPGA-SUME FPGA Board is the ideal platform for high-performance and high-density networking design. A collaborative effort between Digilent, the University of Cambridge, and Stanford University, the NetFPGA-SUME has everything you need to conduct cutting edge research and development of state-of-the-art networking systems.

The NETFPGA-SUME FPGA Board is an amazingly advanced board that features one of the largest and most complex FPGAs ever produced, a Xilinx Virtex-7 690T supporting thirty 13.1 GHz GTH transceivers. Four SFP+ 10Gb/s ports, five independent high-speed memory banks built from both 500MHzQDRII+ & 1866MT/s DDR3 SoDIMM devices, and an eight-lane third generation PCIe offer incredible throughput and can sustain a large number of high-speed data streams to the FPGA fabric and memory devices. Other features include the presentation of twenty transceivers in total on FMC and QTH expansion connectors, and SATA ports.

The NETFPGA-SUME FPGA Board's main mission is to give students, researchers, and developers a state-of-the-art platform for networking, whether it's learning the fundamentals or creating new hardware and software applications. This board easily supports simultaneous wire-speed processing on the four 10Gb/s Ethernet ports, and it can manipulate and process data on-board, or stream it over the 8x Gen.3 PCIe interface and the expansion interfaces.

The NETFPGA-SUME FPGA Board is a line-rate, flexible, and open platform for research, and classroom experimentation. More than 2,000 NetFPGA systems have been deployed at over 150 institutions in over 40 countries around the world.

Features:

• Xilinx Virtex-7 XC7V690T FFG1761-3 
• Xilinx CPLD XC2C512 for FPGA configuration
• PCIe Gen3 x8 (8Gbps/lane)
• Two 512Mbits Micron StrataFlash (PC28F512G18A)
• Programming: Xilinx Vivado^® Design Suite
• Three x36 72Mbits QDR II SRAM (CY7C25652KV18-500BZC)
• Two 4GB DDR3 SODIMM (MT8KTF51264Hz-1G9E1)
• Micro USB Connector for JTAG programming and debugging (shared with UART interface)
• One Micro USB cable for programming/UART
• QTH Connector (8 RocketIO GTH transceivers)
• Four SFP+ interface (4 RocketIO GTH transceivers) supporting 10Gbps
• Two SATA-III ports
• User LEDs and Push Buttons
• One HPC FMC Connector (10 RocketIO GTH transceivers)
• One Pmod connector